Summary: | 碩士 === 國立清華大學 === 工業工程與工程管理學系工程碩士在職專班 === 96 === To avoid wafer contamination in semiconductor manufacturing, some process steps have to set up “queue-time-limit” to keep line yield, If a lot exceeds the queue-time-limit, quality issues will occur and the lot needs to be reworked or scrapped. The influences are more serious especially the lots released in front of a batch workstation. The waiting time may be increased due to “form batch” procedure(i.e. waiting for the same recipe). Besides, this kind of process characteristics will cause high over-queue-time ratio and low throughput.
Once the rework can be reduced, the output qty of the fabrication factories will be increased. Therefore, it is necessary to develop a dispatching rule to determine lot process priority before machine operating in advance. This research focuses on furnace machine area having the two features queue-time-limit and batch process at same time. In this paper, we propose a dispatching rule called “two-stage form batch strategy”(TFBS) with queue-time-limit consideration. Furthermore, TFBS combines “look-ahead” mechanism, which estimates future arrival events according to the information of upstream and downstream on product environment. The objective of TFBS is to prevent the lot from outrunning queue time, decreasing furnace line yield, thus to increase CLIP rate.
The experiment is built and constructed the simulation model by eM-Plant simulation software, made up of eight wet machines, seven furnace machines and five kinds of products on which all products have different processing time, queue time limit and individual furnace machines. In experimental design, three kinds of arrival rate and three level of slack setup on due date, probed into different dispatching rules affected to every performance indices, including CLIP, over-queue-time ratio and furnace line yield. From the result, TFBS performed on CLIP and furnace line yield in very effective improvement.
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