利用正規模型自動化生成時脈精準與時脈數精準的交易層級匯流排模型
碩士 === 國立清華大學 === 資訊工程學系 === 96 === This paper proposes the first automatic approach to simultaneously generate Cycle Accurate and Cycle Count Accurate transaction level bus models. As TLM (Transaction Level Modeling) is proven an effective design methodology to manage ever-increasing complexity of...
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| Format: | Others |
| Language: | en_US |
| Online Access: | http://ndltd.ncl.edu.tw/handle/11891836164513185059 |
| Summary: | 碩士 === 國立清華大學 === 資訊工程學系 === 96 === This paper proposes the first automatic approach to simultaneously generate Cycle Accurate and Cycle Count Accurate transaction level bus models. As TLM (Transaction Level Modeling) is proven an effective design methodology to manage ever-increasing complexity of system level designs, researchers often exploit various abstraction levels to gain either simulation speed or accuracy. Consequently, designers time and again wearily re-write and perform consistency check for different abstraction level models of the same design. To ease the work, we propose a novel correct-by-construction method that automatically and simultaneously generates multiple transaction level bus models for system simulation that can be both fast and accurate. The proposed approach relieves designers from tedious work for model refinement and error-prone consistency check.
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