Integrated Low Dropout Regulator with Fast Transient and Dynamic Output

碩士 === 國立清華大學 === 電機工程學系 === 96 === To guarantee the loop stability, the bandwidth of the conventional linear regulator is limited since the load current is not fixed. We expect to overcome the bottleneck so that the regulator can process high bandwidth and good transient response at the same time....

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Main Authors: Li-Wen Wang, 王俐文
Other Authors: Po-Chiun Huang
Format: Others
Language:en_US
Published: 2007
Online Access:http://ndltd.ncl.edu.tw/handle/28481101799488429762
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spelling ndltd-TW-096NTHU54420142016-05-18T04:12:52Z http://ndltd.ncl.edu.tw/handle/28481101799488429762 Integrated Low Dropout Regulator with Fast Transient and Dynamic Output 具快速暫態反應之嵌入式可變輸出穩壓器 Li-Wen Wang 王俐文 碩士 國立清華大學 電機工程學系 96 To guarantee the loop stability, the bandwidth of the conventional linear regulator is limited since the load current is not fixed. We expect to overcome the bottleneck so that the regulator can process high bandwidth and good transient response at the same time. The research demonstrates that an integrated LDO linear regulator with fast dynamic output. The design is suitable for SoC applications because it can help the integration of elements and their power devices and the optimization of system operation. The regulator design employs a replica-biased feature. By using two loops, we achieved a regulator with good AC response and fast transient response. It can provide multiple output voltages for different requirements of loads, and can be switched fast between active mode and suspend mode. The regulator was fabricated in a 0.18 μm CMOS technology with output voltages from 1.2V to 1.5V and a 120mV dropout voltage. Po-Chiun Huang 黃柏鈞 2007 學位論文 ; thesis 66 en_US
collection NDLTD
language en_US
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sources NDLTD
description 碩士 === 國立清華大學 === 電機工程學系 === 96 === To guarantee the loop stability, the bandwidth of the conventional linear regulator is limited since the load current is not fixed. We expect to overcome the bottleneck so that the regulator can process high bandwidth and good transient response at the same time. The research demonstrates that an integrated LDO linear regulator with fast dynamic output. The design is suitable for SoC applications because it can help the integration of elements and their power devices and the optimization of system operation. The regulator design employs a replica-biased feature. By using two loops, we achieved a regulator with good AC response and fast transient response. It can provide multiple output voltages for different requirements of loads, and can be switched fast between active mode and suspend mode. The regulator was fabricated in a 0.18 μm CMOS technology with output voltages from 1.2V to 1.5V and a 120mV dropout voltage.
author2 Po-Chiun Huang
author_facet Po-Chiun Huang
Li-Wen Wang
王俐文
author Li-Wen Wang
王俐文
spellingShingle Li-Wen Wang
王俐文
Integrated Low Dropout Regulator with Fast Transient and Dynamic Output
author_sort Li-Wen Wang
title Integrated Low Dropout Regulator with Fast Transient and Dynamic Output
title_short Integrated Low Dropout Regulator with Fast Transient and Dynamic Output
title_full Integrated Low Dropout Regulator with Fast Transient and Dynamic Output
title_fullStr Integrated Low Dropout Regulator with Fast Transient and Dynamic Output
title_full_unstemmed Integrated Low Dropout Regulator with Fast Transient and Dynamic Output
title_sort integrated low dropout regulator with fast transient and dynamic output
publishDate 2007
url http://ndltd.ncl.edu.tw/handle/28481101799488429762
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