| Summary: | 碩士 === 國立清華大學 === 電機工程學系 === 96 === Recently, orthogonal frequency division multiple access (OFDMA) systems have been regarded as next generation communication technique. OFDMA systems suffer the same problems as orthogonal frequency division multiplexin (OFDM) communication, especially in frequency synchronization and channel impairment. An uplink OFDMA receiver faces problems of multiple frequency offsets and multipath channels in an OFDM symbol because of multiuser transmission. Therefore, a base station (BS) design becomes a more challenging task. Especially when multi-input multi-output (MIMO) technology is applied to OFDMA communication to improve detection quality or to increase data rate, synchronization and channel estimation problems become more complicated.
In this thesis, a prototype of OFDMA uplink transceiver design based on IEEE 802.16e standard is proposed and implemented. The proposed transceiver consists of an inter-carrier interference/ multiple-access interference (ICI/MAI) canceller, an ICI-cancellation-based carrier frequency offset (CFO) estimator, a channel estimator, a MIMO detector and a general OFDMA baseband engine. The proposed architecture is aim to estimate the CFO with low cost but high precision based on ICI cancelation and with the help of channel estimation by binary search method. Linear interpolation/extrapolation and coefficient approximation technique are applied in channel estimation for reducing hardware complexity but still with high performance. The proposed architecture has 342 gate-count saving compared to conventional one and is implemented in field-programmable gate array (FPGA) board and integrated in
SoC platform.
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