The back-end of layout vs. schematic checker for microwave multi-layer circuits:schematic mapping

碩士 === 臺灣大學 === 電子工程學研究所 === 96 === This thesis is focus on the back-end of layout vs. schematic check. It is divided into three parts. The first part is to convert shematic dsn file into a graphic representation. The second part is to check the DC path between any circuit ports. The third part is t...

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Bibliographic Details
Main Authors: Jia-Ming Chang, 張家銘
Other Authors: Hsin-Chia Lu
Format: Others
Language:zh-TW
Published: 2008
Online Access:http://ndltd.ncl.edu.tw/handle/76614278152137678573
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spelling ndltd-TW-096NTU054280022015-10-13T14:04:51Z http://ndltd.ncl.edu.tw/handle/76614278152137678573 The back-end of layout vs. schematic checker for microwave multi-layer circuits:schematic mapping 微波多層電路之佈局對電路檢查的後段:電路之比對 Jia-Ming Chang 張家銘 碩士 臺灣大學 電子工程學研究所 96 This thesis is focus on the back-end of layout vs. schematic check. It is divided into three parts. The first part is to convert shematic dsn file into a graphic representation. The second part is to check the DC path between any circuit ports. The third part is the schematic mapping between user supplied schematic and schematic extracted from layout of microwave multi-layer circuits. This can help designer to validate his/her layout. These three parts forms the back-end of layout vs. schematic (LVS) check. Hsin-Chia Lu 盧信嘉 2008 學位論文 ; thesis 65 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 臺灣大學 === 電子工程學研究所 === 96 === This thesis is focus on the back-end of layout vs. schematic check. It is divided into three parts. The first part is to convert shematic dsn file into a graphic representation. The second part is to check the DC path between any circuit ports. The third part is the schematic mapping between user supplied schematic and schematic extracted from layout of microwave multi-layer circuits. This can help designer to validate his/her layout. These three parts forms the back-end of layout vs. schematic (LVS) check.
author2 Hsin-Chia Lu
author_facet Hsin-Chia Lu
Jia-Ming Chang
張家銘
author Jia-Ming Chang
張家銘
spellingShingle Jia-Ming Chang
張家銘
The back-end of layout vs. schematic checker for microwave multi-layer circuits:schematic mapping
author_sort Jia-Ming Chang
title The back-end of layout vs. schematic checker for microwave multi-layer circuits:schematic mapping
title_short The back-end of layout vs. schematic checker for microwave multi-layer circuits:schematic mapping
title_full The back-end of layout vs. schematic checker for microwave multi-layer circuits:schematic mapping
title_fullStr The back-end of layout vs. schematic checker for microwave multi-layer circuits:schematic mapping
title_full_unstemmed The back-end of layout vs. schematic checker for microwave multi-layer circuits:schematic mapping
title_sort back-end of layout vs. schematic checker for microwave multi-layer circuits:schematic mapping
publishDate 2008
url http://ndltd.ncl.edu.tw/handle/76614278152137678573
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