Design of the 8-bit Switched-Current Pipelined Analog-to-Digital Converter
碩士 === 國立臺北科技大學 === 通訊與資訊產業研發碩士專班 === 96 === This paper presents a design of the switched-current pipelined A/D converter. In the proposed pipelined ADC, the simulated results show that the proposed ADC performs not only with the sampling frequency of 50 M sample/s, but also with the resolution of...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2008
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/65dk2x |