Dynamic Hardware-Software Task Migration and Relocation Coordinator for Partially Reconfigurable Systems
碩士 === 國立中正大學 === 資訊工程所 === 97 === With technology advances, an important feature provided by modern Field Programmable Gate Arrays (FPGAs) is the support for partial reconfiguration capability that is hardware tasks can be configured at run-time. A system with partial reconfiguration capability is...
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ndltd-TW-097CCU053920912016-05-04T04:26:08Z http://ndltd.ncl.edu.tw/handle/76853875778428208656 Dynamic Hardware-Software Task Migration and Relocation Coordinator for Partially Reconfigurable Systems 針對動態部份可重組系統之動態軟硬體工作切換與重新配置協調器 Chung-ting Lan 藍竣廷 碩士 國立中正大學 資訊工程所 97 With technology advances, an important feature provided by modern Field Programmable Gate Arrays (FPGAs) is the support for partial reconfiguration capability that is hardware tasks can be configured at run-time. A system with partial reconfiguration capability is called reconfigurable computing (RC) based system. The RC-based system can dynamically configure hardware components to enhance performance. However, due to limited FPGA resource, not all computation can run in hardware. Hence, the efficient use of limited FPGA resources is an important objective. A hardware task with lower priority in FPGA can be replaced by other urgent hardware task through task migration and relocation mechanism. In the other words, a task can migrate between the processor and the FPGA. When a task is migrated to the processor or FPGA, the task can continue working from where it stopped using a software approach called mediator. In the mediator approach, if the amount of information contained in the state and data is too large, it causes the task’s relocation time to be longer than its execution time. Thus, in the Thesis we proposed an approach to reduce the migration and relocation time overhead. In addition, there are some issues needs to be solved in the task migration and relocation mechanism, such as migration point, uniform communication model, and communication maintenance. We proposed an approach called coordinator to solve above issues. Finally, some implementation examples are provided to prove the correctness of the proposed approach. For the GCD example, compared the mediator approach, the coordinator approach reached a speedup of 84% in task migration and relocation processing time when a hardware task migrated to software. Pao-Ann Hsiung 熊博安 2009 學位論文 ; thesis 55 en_US |
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碩士 === 國立中正大學 === 資訊工程所 === 97 === With technology advances, an important feature provided by modern Field Programmable Gate Arrays (FPGAs) is the support for partial reconfiguration capability that is hardware tasks can be configured at run-time. A system with partial reconfiguration capability is called reconfigurable computing (RC) based system. The RC-based system can dynamically configure hardware components to enhance performance. However, due to limited FPGA resource, not all computation can run in hardware. Hence, the efficient use of limited FPGA resources is an important objective. A hardware task with lower priority in FPGA can be replaced by other urgent hardware task through task migration and relocation mechanism. In the other words, a task can migrate between the processor and the FPGA. When a task is migrated to the processor or FPGA, the task can continue working from where it stopped using a software approach called mediator. In the mediator approach, if
the amount of information contained in the state and data is too large, it causes the task’s relocation time to be longer than its execution time. Thus, in the Thesis we proposed an approach to reduce the migration and relocation time overhead. In addition, there are some issues needs to be solved in the task migration and relocation mechanism, such as migration point, uniform communication model, and communication maintenance. We proposed an approach called coordinator to solve above issues. Finally, some implementation examples are provided to prove the correctness of the proposed approach. For the GCD example,
compared the mediator approach, the coordinator approach reached a speedup of 84% in task migration and relocation processing time when a hardware task migrated to software.
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author2 |
Pao-Ann Hsiung |
author_facet |
Pao-Ann Hsiung Chung-ting Lan 藍竣廷 |
author |
Chung-ting Lan 藍竣廷 |
spellingShingle |
Chung-ting Lan 藍竣廷 Dynamic Hardware-Software Task Migration and Relocation Coordinator for Partially Reconfigurable Systems |
author_sort |
Chung-ting Lan |
title |
Dynamic Hardware-Software Task Migration and Relocation Coordinator for Partially Reconfigurable Systems |
title_short |
Dynamic Hardware-Software Task Migration and Relocation Coordinator for Partially Reconfigurable Systems |
title_full |
Dynamic Hardware-Software Task Migration and Relocation Coordinator for Partially Reconfigurable Systems |
title_fullStr |
Dynamic Hardware-Software Task Migration and Relocation Coordinator for Partially Reconfigurable Systems |
title_full_unstemmed |
Dynamic Hardware-Software Task Migration and Relocation Coordinator for Partially Reconfigurable Systems |
title_sort |
dynamic hardware-software task migration and relocation coordinator for partially reconfigurable systems |
publishDate |
2009 |
url |
http://ndltd.ncl.edu.tw/handle/76853875778428208656 |
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