Accelerating Recognition System of Leaves on Nios II Embedded Platform
碩士 === 清雲科技大學 === 電子工程研究所 === 98 === In this paper, we present an efficient HW/SW codesign architecture of a Recognition System of Leaves. The architecture includes pre-processing modules for the input video signal from the camera and interfaces for the external video memory and the LCD. The recogni...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/67593878111384168701 |
| Summary: | 碩士 === 清雲科技大學 === 電子工程研究所 === 98 === In this paper, we present an efficient HW/SW codesign architecture of a Recognition System of Leaves. The architecture includes pre-processing modules for the input video signal from the camera and interfaces for the external video memory and the LCD. The recognition of leaf is implemented by hardware in FPGA. By using the five mega-pixel camera included in the Altera DE2-70 kit for input, image processing can be done by FPGA Cyclone II EP2C70F89C6N with ~70,000 LEs on Altera DE2-70 kit.
The measurement results can verify HW/SW codesign architecture of leaves recognition easily achieves faster processing performance than the pure SW technique.
Using hardware acceleration presents a speed up factor of 7 times over a software implementation.
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