Accelerating Recognition System of Leaves on Nios II Embedded Platform

碩士 === 清雲科技大學 === 電子工程研究所 === 98 === In this paper, we present an efficient HW/SW codesign architecture of a Recognition System of Leaves. The architecture includes pre-processing modules for the input video signal from the camera and interfaces for the external video memory and the LCD. The recogni...

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Main Authors: Hao-Gong Zhou, 周顥恭
Other Authors: Yu-Ping Liao
Format: Others
Language:zh-TW
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/67593878111384168701
id ndltd-TW-097CYU00428014
record_format oai_dc
spelling ndltd-TW-097CYU004280142015-12-25T04:15:03Z http://ndltd.ncl.edu.tw/handle/67593878111384168701 Accelerating Recognition System of Leaves on Nios II Embedded Platform 在NIOSII嵌入式平台實現硬體加速於葉形辨識系統 Hao-Gong Zhou 周顥恭 碩士 清雲科技大學 電子工程研究所 98 In this paper, we present an efficient HW/SW codesign architecture of a Recognition System of Leaves. The architecture includes pre-processing modules for the input video signal from the camera and interfaces for the external video memory and the LCD. The recognition of leaf is implemented by hardware in FPGA. By using the five mega-pixel camera included in the Altera DE2-70 kit for input, image processing can be done by FPGA Cyclone II EP2C70F89C6N with ~70,000 LEs on Altera DE2-70 kit. The measurement results can verify HW/SW codesign architecture of leaves recognition easily achieves faster processing performance than the pure SW technique. Using hardware acceleration presents a speed up factor of 7 times over a software implementation. Yu-Ping Liao 廖裕評 2010 學位論文 ; thesis 79 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 清雲科技大學 === 電子工程研究所 === 98 === In this paper, we present an efficient HW/SW codesign architecture of a Recognition System of Leaves. The architecture includes pre-processing modules for the input video signal from the camera and interfaces for the external video memory and the LCD. The recognition of leaf is implemented by hardware in FPGA. By using the five mega-pixel camera included in the Altera DE2-70 kit for input, image processing can be done by FPGA Cyclone II EP2C70F89C6N with ~70,000 LEs on Altera DE2-70 kit. The measurement results can verify HW/SW codesign architecture of leaves recognition easily achieves faster processing performance than the pure SW technique. Using hardware acceleration presents a speed up factor of 7 times over a software implementation.
author2 Yu-Ping Liao
author_facet Yu-Ping Liao
Hao-Gong Zhou
周顥恭
author Hao-Gong Zhou
周顥恭
spellingShingle Hao-Gong Zhou
周顥恭
Accelerating Recognition System of Leaves on Nios II Embedded Platform
author_sort Hao-Gong Zhou
title Accelerating Recognition System of Leaves on Nios II Embedded Platform
title_short Accelerating Recognition System of Leaves on Nios II Embedded Platform
title_full Accelerating Recognition System of Leaves on Nios II Embedded Platform
title_fullStr Accelerating Recognition System of Leaves on Nios II Embedded Platform
title_full_unstemmed Accelerating Recognition System of Leaves on Nios II Embedded Platform
title_sort accelerating recognition system of leaves on nios ii embedded platform
publishDate 2010
url http://ndltd.ncl.edu.tw/handle/67593878111384168701
work_keys_str_mv AT haogongzhou acceleratingrecognitionsystemofleavesonniosiiembeddedplatform
AT zhōuhàogōng acceleratingrecognitionsystemofleavesonniosiiembeddedplatform
AT haogongzhou zàiniosiiqiànrùshìpíngtáishíxiànyìngtǐjiāsùyúyèxíngbiànshíxìtǒng
AT zhōuhàogōng zàiniosiiqiànrùshìpíngtáishíxiànyìngtǐjiāsùyúyèxíngbiànshíxìtǒng
_version_ 1718157499648966656