An Implementation of H.264 Encoder on DSP

• Main Authors: Jiun-Chiang Wang, 王俊強
• Other Authors: Yen-Jen Chen
• Format: Others
• Language: zh-TW
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/42464295016121946231

碩士 === 明志科技大學 === 電機工程研究所 === 98 === With the remarkable advance in video and multimedia applications, video encoding technology is receiving increasing attention. H.264 is the video encoding technology with the best quality and performance nowadays, This video encoding technology was proposed in May 2003 by the Joint Video Team (JVT), which was composed of MPEG and VCEG. At the same time, the team also released the video encoding source code of JM for the x86 platform. JM has complete video encoding capabilities, but the effectiveness of its implementation is not very good. In addition, in this research that uses the DM6437 embedded platform with an external memory of only 128Mbyte capacity, the limited memory space for the huge video encoding algorithm will be a challenge. Therefore, after referring to JM8.0, which is in line with the source coding standard, and considering the limited memory space, the objective of this research is to develop the Constrained Baseline Profile video encoding technology in the DM6437 embedded platform while improving performance efficiency. Now, our encoder that was implemented on the x86 platform has surpassed JM8.0 by two frames per second in the same settings. When transferred to the DM6437 embedded platform, in order to compensate for the decreased processing speed of the low-power microprocessor, the application of Texas Instruments (TI) program development environment Code Composer Studio (CCS) optimization tools is required. This research processes the optimization in 2 ways. The first way is to utilize the TI CCS 3.3 for the optimization of system coding with o3 level (most optimized level). The second way is to utilize the cache memory allocation that is equipped inside the DM6437 so that the system code/data that is frequently used can remain inside the cache memory for as long as possible. Usage of the memory cache could achieve optimization because it decreases the number of times that DSP needs to access the main memory. The o3 level optimization will lead to an increase of memory usage, so that the code reduction (-ms1) function is required at compiling step. At this stage, the Constrained Baseline Profile H.264 encoder implemented in DM6437 has been able to encode the QCIF video sequence with 3.44 frames per second. Based on consideration of real-time video encoding, the required number of video frames is 25 to 30. The future focus will be placed on optimizing the effectiveness of the encoder. The parallel processing optimization techniques will be an important turning point. The fine tuning of parallel processing in assembly language mechanism will be considered afterwards to achieve the best performance of the H.264 encoder.