All Digital Phase-Locked Loop With Programmable Phase Injection Locking
碩士 === 國立交通大學 === 電機與控制工程系所 === 97 === This thesis propose an all digital phase-locked loop with programmable phase injection locking mechanics. The phase injection to the digitally controlled oscillator can reduce the phase noise. Using programmable phase injection strength can achieve optimum out...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/51857591927968419002 |
| Summary: | 碩士 === 國立交通大學 === 電機與控制工程系所 === 97 === This thesis propose an all digital phase-locked loop with programmable phase injection locking mechanics. The phase injection to the digitally controlled oscillator can reduce the phase noise. Using programmable phase injection strength can achieve optimum output performance in different environment. In order to enhance the resolution of digitally controlled oscillator , we use sigma-delta modulator to achieve fractional control on the LSB. This method will enhance resolution of the digitally controlled oscillator.
The proposed ADPLL is implemented in TSMC 0.13 um 1P6M RF technology. The simulation results show that the output clock has a peak-to-peak jitter of 17ps, the power dissipation is 22mW, the output frequency is 1.25GHZ
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