Ku/K Band Voltage Controlled Osillator, Injection Locked Frequency Divider, and Millimeter-Wave Voltage Controlled Oscillator, Broadband Mixer Using fT-Doubler Technique

• Main Authors: Wei-Ciang Chen, 陳瑋強
• Other Authors: Hwann-Kaeo Chiou
• Format: Others
• Language: zh-TW
• Published: 2009
• Online Access: http://ndltd.ncl.edu.tw/handle/18541163600461452679

碩士 === 國立中央大學 === 電機工程研究所 === 97 === The content of this thesis consists of six chapters. Two types RF and mm-wave circuits will be investigated in this thesis. The first one is an LO generation of Ku-band system, include voltage controlled oscillator (VCO) and injection locked frequency divider (ILFD), and a compact VCO for K-band system. The other one is millimeter-wave VCO, broadband mixer, and broadband sub-harmonic mixer using fT-doubler cell, which are implemented in TSMC 0.18-μm and TSMC 0.13-μm CMOS technologies, respectively. Chapter two presents Ku/K-band voltage controlled oscillators with amplitude redistribution technique. The linear time-varying system concept is used to analyze the phase noise causing, and discuss the effect of the voltage limit and current limit of the VCO topology. The VCO is implemented by the bi-resonator to enhance the amplitude at the gate terminal of the cross couple pairs, which also increases the signal-to-noise ratio (SNR) to suppress the noise current injected to resonator, also decreases the power spectrum density on the phase noise, simultaneously. The analysis results are verified by hands-on calculation, circuit simulation, and measurements. A 3-bit band-switching amplitude redistribution VCO was implemented in TSMC 0.18-μm CMOS technology. The obtained oscillation frequency is 12.8 GHz, with a tuning range of 720 MHz under the supply voltage of 1.2 V. The power consumption is 6.4 mW. The measured phase noise is -114.83 dBc/Hz at 1-MHz offset frequency. The figure-of-merit (FoM) is -188.93 dBc/Hz. The total chip size included the test pads is 0.54 mm2. An un-equal Q value of transformer architecture, instead of bi-resonator, is proposed to save chip area. The un-equal Q transformer with amplitude redistribution VCO was implemented in TSMC 0.13-μm CMOS technology. The center frequency is 25 GHz with the tuning range of 900 MHz under the supply voltage of 1.2 V. The power consumption is 5.82 mW. The measured phase noise is -107.16Bc/Hz at 1-MHz offset frequency. The figure-of-merit (FoM) is -187.6 dBc/Hz. The core area of this VCO is only 0.02 mm2. Chapter three presents a Gm-boosted injection-locked frequency divider (ILFD) applied in Ku-band system. This ILFD circuit was implemented in TSMC 0.18-μm CMOS technology. The ILFD provides a wide locking range under low power dissipation through Gm-boosted VCO topology with the proper choice the bias point of injection transistor. The operating frequency is 11-14.4 GHz (>26.7%) under the supply voltage of 1.8 V. The power consumption is 3.78 mW. The calculated figure-of-merit is up to 7.36 %/mW. The total chip size included the test pads is 0.415 mm2. Chapter four presents three types of millimeter-wave VCO using the fT-doubler cell. The fT-doubler cell is analyzed and applied to VCO designs, which perform low power dissipation and low phase noise. The VCO design using topology I can operate up to 74 GHz with the tuning range of 1100 MHz under a supply voltage of 1.2 V. The power consumption is 12.38 mW. The measured phase noise is -114.7 dBc/Hz at 10-MHz offset frequency. The calculated FoM is -181.2 dBc/Hz. The core area is only 0.012 mm2. The VCO design using topology II combines with the intrinsic capacitor to vary the operation frequency. The obtained center frequency is 65 GHz with a tuning range of 225 MHz under the supply voltage of 1.5 V. The power consumption is 9 mW. The measured phase noise is -102.8 dBc/Hz at 10-MHz offset frequency. The calculated FoM is -169.6 dBc/Hz. The core area is only 0.024 mm2. The VCO design using topology III modifies the fT-doubler cell to improve the phase noise for a noise filter and design a high Q μ–micro stripline to instead the inductor of resonator. The center frequency is 58.5 GHz with a tuning range of 2590 MHz under the supply voltage of 1.2 V. The power consumption is 5 mW. The measured phase noise is -121.8 dBc/Hz at 10-MHz offset frequency. The calculated FoM is -190.1 dBc/Hz. The core area is only 0.02 mm2. Chapter five presents millimeter-wave broadband mixers using fT-doubler cell. The novel active single-ended mixer provides broadband, low power dissipation, and high conversion gain performance. The RF signal of mixer feeds in the through port of the Lange coupler to compensate the fT decrease of the fT-doubler cell against the frequency. The first one fT-doubler mixer was implemented in TSMC 0.18-μm CMOS technology with excellent performance. The operating frequency range of the mixer is 7~67 GHz under the supply voltage of 1.8 V. The power consumption is 9.54 mW. The conversion gain is 4.6±1 dB with the OP1dB of -2 dBm. The isolation of LO-IF, LO-RF, and RF-IF was better than 11 dB. The compact core chip area is 0.5 mm2. The second fT-doubler mixer was implemented in TSMC 0.13-μm CMOS technology. The single-ended mixer obtains the measured conversion gain of 6.7±3 dB from 4.5~67 GHz under the supply voltage of 1.8 V. The power consumption is 18 mW. The isolation of LO-IF is better than 30 dB. The measured OP1dB is 1 dBm. The core chip area is 0.15 mm2. To improve the isolation, a novel sub-harmonic mixer combines with a power divider and a stacked Marchand balun to input the signals of RF and LO. This broadband sub-harmonic mixer achieves a conversion gain of 0±2 dB from 35 to 64 GHz under the supply voltage of 1.8V. The total power dissipation is 13.7 mW. The measured isolations of LO-IF and LO-RF are better than 32 dB, RF-IF isolation is better than 44 dB. The measured OP1dB is 2 dBm. The core chip area is 0.71 mm2.