Balanced-Via Channel Routing for Array-type MiM Capacitors
碩士 === 國立中央大學 === 電機工程研究所 === 97 === Devices mismatch is usually caused by the process variation. The uncontrollable process variation has become a severe problem as the semiconductor technology continues to shrink. We proposed the Balanced-Via Channel Routing (BVCR) to implement the optimum placeme...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/60144060730254321416 |