Design of Digital-Controlled Oscillator and Voltage-Controlled Oscillator in Phase-Locked Loops fro WiMAX applications

• Main Authors: Yu-ling Chou, 周侑陵
• Other Authors: Jian-Ming Wu
• Format: Others
• Language: zh-TW
• Online Access: http://ndltd.ncl.edu.tw/handle/y2dghf

碩士 === 國立臺南大學 === 通訊工程研究所碩士班 === 97 === The digital-controlled oscillator (DCO) and the voltage-controlled oscillator (VCO) for WiMAX applications are designed and implemented in this thesis. The developed DCO and VCO are used in a phase-locked loop (PLL) for the evaluation of PLL’s performance adopting digital- or analogy- controlled oscillator. The design of VCO is based on Clapp oscillator. The measured results of VCO include that the frequency tuning range is 330 MHz, the output power is 8.2 dBm, the 2nd harmonic suppression is -18 dBc, the gain is 110 MHz/V, as well as the phase noise is -84 dBc at 100 kHz offset and -115 dBc at 1 MHz offset, respectively. The supply voltage is 3 V and the consumed current is 25 mA. The design of DCO is also based on Clapp. The digital frequency-controlled circuit is performed using 5-bit controlled unit. The first bit to forth bit are designed for the frequency coarse tuning, and the fifth bit is designed for the selection of upper band or lower band. The supply voltage of DCO is 3 V and consumed current is 25 mA. The measured results of DCO include that the frequency tuning range is 60 MHz, the output power is 4.5 dBm, the 2nd harmonic suppression is -14 dBc, the gain is 12 MHz/V, as well as the phase noise is -87 dBc at 100 kHz offset and -110.5 dBc at 1 MHz offset, respectively. In the last stage of this thesis, the developed DCO and VCO are applied into the integer-N PLL PE3336 providing Peregrine Semiconductor to investigate the performance of PLL. The DCO has been suppressed the phase noise in the bandwidth of PLL by 7 dBc/Hz when compared to the VCO due to the DCO’s low gain.