SoPC-based Memetic Algorithm for Vector Quantizer Design

• Main Authors: Sheng-Kai Weng, 翁聖凱
• Other Authors: Wen-Jyi Hwang
• Format: Others
• Language: zh-TW
• Online Access: http://ndltd.ncl.edu.tw/handle/c54g3a

碩士 === 國立臺灣師範大學 === 資訊工程研究所 === 97 === A novel hardware architecture for memetic vector quantizer (VQ) design is presented in this thesis. The architecture uses steady-state genetic algorithm (GA) for global search, and C-means algorithm for local refinement. It adopts a shift register based circuit for accelerating mutation and crossover operations in the steady state GA. It also uses a pipeline architecture for the hardware implementation of C-means algorithm. The proposed architecture has been embedded in a softcore CPU for physical performance measurement. Experimental results show that the proposed architecture is an effective alternative for VQ optimization attaining both high performance and low computational time.