Design and Implementation of Wideband Low Noise Amplifier

• Main Authors: Shou-Chung Yen, 嚴守中
• Other Authors: 黃育賢
• Format: Others
• Language: zh-TW
• Published: 2009
• Online Access: http://ndltd.ncl.edu.tw/handle/c34946

碩士 === 國立臺北科技大學 === 電子電腦與通訊產業研發碩士專班 === 97 === In this thesis, we design two wideband low noise amplifiers (LNAs) and a multiband LNA for L band and DTV、DAB systems, which are implemented in TSMC 0.18 μm CMOS technology. In this thesis, we propose three circuits. In the first circuit, we propose a CMOS wideband low noise amplifier without inductor, operated in the range from 100MHz~900MHz, with current reuse, mirror bias, gain control and input matching device noise cancellation technologies. Measurement results at maximum power consumption mode show that the gain is 11.2~13.6dB, the noise figure (NF) is less than 2.75dB, and the third-order intercept point (IIP3) is about -4.6dBm at minimum power operation mode.The LNA consumes power between 7.25mW (low gain mode) ~17.8mW (high gain mode) at 1.8V power supply. The core area is 0.29 mm2. In the second circuit,we propose a CMOS wideband low noise amplifier (LNA), operated in the range from 470MHz~3GHz, with current reuse, mirror bias, and source inductive degeneration technologies. Measurement results at maximum power consumption mode show that the gain is 11.3~13.6dB, the NF is less than 2.5dB, and the third-order intercept point is about 1dBm. It consumes maximum power about 27mW at 1.8V power supply. The core area is 0.52mm2. In the third circuit, we propose a interference rejection multiband differential low noise amplifier (LNA), operated in the range from 800MHz~1.4GHz, with Capacitive Cross-Coupling (CCC), Gm-Boosted, mirror bias, and negative resistance technologies. Measurement results the gain is 13.16dB, the NF is less than 2.87dB, and the third-order intercept point is about 6.36dBm. It consumes power about 32.9mW at 1.8V power supply. The core area is 1.82 mm2.