A Third-Order Multi-bit Delta-Sigma Modulator with MCIFF Structure for Wideband Applications

• Main Authors: Chien-Yu Chen, 陳建宇
• Other Authors: Chien-Hung Kuo
• Format: Others
• Language: en_US
• Published: 2009
• Online Access: http://ndltd.ncl.edu.tw/handle/82459191550322605286

碩士 === 淡江大學 === 電機工程學系碩士班 === 97 === In recent years, there has been a dramatic proliferation of research concerned with the low-power circuits due to the substantial growth of the portable electronic products in communication applications [1-3]. Toward this aim, many low-voltage and low-power designs have been devoted to with the incitation of the continuing progress of the advanced CMOS technology [4-5]. Nevertheless, the decrease of supply voltage retards the development of the low-power analog-to-digital converters (ADCs) in high-resolution high-accuracy wide-bandwidth applications. This thesis presents the improved third-order low-distortion multi-bit delta-sigma modulator for wideband applications. The improvement of modified cascade integrators with distributed feedforward (IMCIFF) structure without summer in front of quantizer is realized to save the power consumption in the presented modulator. We take the optimum current of all Opamps in this improved modulator and make the total current be reduced. The prototype circuit is realized in the third-order multi-bit Delta-sigma (ΔΣ) modulator, which has been fabricated in 0.18μm 1P6M CMOS process. The simulated signal-to-noise plus distortion ratio (SNDR) of the modulator within a 200 kHz of bandwidth under a 13.76 MHz of clock rate is 93.69 dB. The total power consumption of the modulator is 4.034 mW at a 1.8 V of supply voltage.