Compiler Support for Reducing Memory Footprint on Execute-In-Place Architecture

• Main Authors: Chia-Gea Kuo, 郭佳衢
• Other Authors: Peng-Sheng Chen
• Format: Others
• Language: en_US
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/31521165484792378378

碩士 === 國立中正大學 === 資訊工程所 === 98 === Execute-In-Place (XIP) architecture which can quickly boot and execute embedded applications is the most common memory sub-system setup in cellular phone architectures today. Consider the problem of reducing memory footprint, traditional solutions are not applicable to this architecture. In this thesis, we propose a novel algorithm to reduce the run-time memory footprint of an application on Execute-In-Place architecture. The algorithm consists of alias analysis, liveness analysis, interference graph construction, graph coloring, and code transformation. The problem is suitably mapped into the problem of graph coloring, and the data type “union” in C programming language is adopted to reuse needless memory space. We implement the algorithm based on the Cetus compiler infrastructure. Experimental results show that the technique can reduce peak memory footprint in benchmark programs with about 3.65% in average.