Dynamic Task Scheduling with Congestion Speculation for Network-on-Chip

• Main Authors: Sheng-Ya Tong, 童聖亞
• Other Authors: Pao-Ann Hsiung
• Format: Others
• Language: en_US
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/41614103482189619352

碩士 === 國立中正大學 === 資訊工程所 === 98 === Network-on-Chip (NoC) is considered as a promising communication architecture to replace the dedicated interconnections and shared buses for future embedded system platforms. In such a parallel platform, the mapping for application to NoC becomes a key issue because it affects throughput significantly due to the problem of communication congestion, which causes the increased communication latency, and the lowered system performance and resource utilization. Beside, to design an efficient NoC platform, mapping task to computation nodes and scheduling communication should be taken into consideration. In this work, we propose an efficient dynamic task scheduling with congestion speculation (DTSCS) that not only includes the conventional application mapping but also further considers the future traffic pattern based on the link utilization. The proposed algorithm can reduces the overall congestion, instead of only improving the current packet blocking situation. Our experiment results have demonstrated that compared to other existing congestion-aware algorithms, the proposed DTSCS algorithm can reduce up to 40.5% of average communication latency, while the maximal communication latency can be reduced by up to 67.7%.