Compiler-Assisted Code Arrangement on Demand Paging with NAND Flash Memory

• Main Authors: Cyun-Yuan Chen, 陳群元
• Other Authors: Rong-Guey Chang
• Format: Others
• Language: en_US
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/20664733452456127637

碩士 === 國立中正大學 === 資訊工程所 === 98 === Recently, demand paging technology with NAND flash memory has been applied widely to embedded system with NAND flash memory. Traditionally, the page fault is a major performance bottleneck in demand paging systems. The key problem is how to reduce the times of page fault to improve system performance. In order to solve the problem, we proposed the method combine compiler and OS technology to work together. First, it analyzes the ELF(Executable and Linking Format) of the program with compiler, and reconstructs it by code arrangement. The code arrangement can cluster the most execution frequency function code together. The code arrangement will produce the binary mapping information. After code arrangement, we can use the code prefetch strategy to reduce the overall system fault page overhead by it to reduce the I/O latency. The experiment results that the requirement of pages are decreased 3.3% on average.