| Summary: | 碩士 === 逢甲大學 === 資訊電機工程碩士在職專班 === 98 === With the development of technology, people have become increasingly demanding about the convenient living. Contact and communication between people have been progress transmitted by cable to the wireless transmission, makes the wireless communication system to flourish, with computers and mobile communications markets warm to stimulate the development of wireless local area network products, due to the rapid development of CMOS process, RF front-end circuit gradually to implement by CMOS process, it not only reduce production costs, but also increase system integration, makes a large number of microwave integrated circuits used in wireless communications products.
The proposed Ku/K band LNAs were implemented and manufactured based on TSMC standard 0.18 ?慆 RF CMOS process. Designed and simulated with Agilent’s Advanced Design System (ADS). The circuit layout using Cadence Virtuoso. From the design flow, circuit simulation, layout of circuit, and measured of chip have been described completely.
The first LNA, we proposed a fully integrated 18 GHz LNA. The LNA has been implemented by the National Chip Implement Center (CIC). This chip adopts on-wafer method to measure S-parameter and linearity. The proposed CMOS LNA is composed of two stages common-source cascade amplifier, input impedance matching adopted to inductive degeneration structure. When operated at 18 GHz the measured results as follows, S11 is -16.69 dB, power gain is 10.6 dB, S22 is -12.84 dB, NF (noise figure) is 3.65 dB, P1dB is -8.9 dBm, power consumption is 10.2 mW .
The second LNA, we proposed a wide-band low noise amplifier for Ku-band application. The circuit structure is R-C feedback in cascade amplifier. When operated at 12-18 GHz the simulated results as follows, S11 is -10.91 dB ~ -20.88 dB, power gain is 16.31 dB ~ 16.91 dB, S22 is -11.65 dB ~ -16.88 dB, NF (noise figure) is 3.1 dB ~ 3.34 dB, P1dB @ 12, 15 and 18 GHz were -12.2 dBm, -10.4 dBm, -8.6 dBm, power consumption is 26.6 mW.
The third LNA, we proposed a wide-band low noise amplifier for K-band application. The LNA is being implemented by the National Chip Implement Center (CIC). The circuit structure is R-C feedback in cascade amplifier. When operated at 18-27 GHz the simulated results as follows, S11 is -10.65 dB ~ -24.46 dB, power gain is 11.34 dB ~ 11.64 dB, S22 is -10.3 dB ~ -13.54 dB, NF (noise figure) is 3.29 dB ~ 3.53 dB, P1dB @ 18, 22 and 27 GHz were -9.6 dBm, -8.4 dBm, -6.2 dBm, power consumption is 19.14 mW.
|
|---|
