Research and Implementation of Real-Time Visual Target Tracking SoC System via FPGA Technique
碩士 === 國立成功大學 === 工程科學系碩博士班 === 98 === The research purpose of this thesis is to design and implement a real-time visual target tracking system via FPGA technique. In the past researches, target tracking system was mainly operated on PC-based platform, thus it must first transmit the image to the co...
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ndltd-TW-098NCKU50280342015-11-06T04:03:44Z http://ndltd.ncl.edu.tw/handle/82801526298216062920 Research and Implementation of Real-Time Visual Target Tracking SoC System via FPGA Technique 基於可規劃邏輯陣列設計技術之低成本即時影像追蹤SoC系統研究與實現 Chun-IKuo 郭俊驛 碩士 國立成功大學 工程科學系碩博士班 98 The research purpose of this thesis is to design and implement a real-time visual target tracking system via FPGA technique. In the past researches, target tracking system was mainly operated on PC-based platform, thus it must first transmit the image to the computer terminal to operate and then give control command to interested object. This study adopts FPGA XILINX-XC3S400 which has 400,000 gate counts, CMOS Sensor PAS6311 image capture device and Stepper Motor to complete the real-time target tracking system. The algorithm is mainly based on adaptive background subtraction. Advantage lies in its ability to adapt to small changes in the background, such as swaying leaves and use Gaussian standard deviation as adaptive threshold to effectively separate moving object. In order to achieve true real-time detection, the operations of this system algorithm are all constituted by logic gates of FPGA. Using pipe-line design to quickly obtain Gaussian standard deviation, and proposed the design method of the bi-counters to improve the delay caused by mask operation of Morphological Opening. Furthermore, SRAM memory device and Stepper Motor control are integrated to achieve our design. Hence, this system can immediately detect and to track moving object after each image was output, ensure that the target can be maintain in the traceability scope. From the relative position of moving object and camera lens can display the effectiveness of our real-time tracking system. Teh-Lu Liao 廖德祿 2010 學位論文 ; thesis 64 en_US |
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碩士 === 國立成功大學 === 工程科學系碩博士班 === 98 === The research purpose of this thesis is to design and implement a real-time visual target tracking system via FPGA technique. In the past researches, target tracking system was mainly operated on PC-based platform, thus it must first transmit the image to the computer terminal to operate and then give control command to interested object. This study adopts FPGA XILINX-XC3S400 which has 400,000 gate counts, CMOS Sensor PAS6311 image capture device and Stepper Motor to complete the real-time target tracking system. The algorithm is mainly based on adaptive background subtraction. Advantage lies in its ability to adapt to small changes in the background, such as swaying leaves and use Gaussian standard deviation as adaptive threshold to effectively separate moving object. In order to achieve true real-time detection, the operations of this system algorithm are all constituted by logic gates of FPGA. Using pipe-line design to quickly obtain Gaussian standard deviation, and proposed the design method of the bi-counters to improve the delay caused by mask operation of Morphological Opening. Furthermore, SRAM memory device and Stepper Motor control are integrated to achieve our design. Hence, this system can immediately detect and to track moving object after each image was output, ensure that the target can be maintain in the traceability scope. From the relative position of moving object and camera lens can display the effectiveness of our real-time tracking system.
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Teh-Lu Liao |
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Teh-Lu Liao Chun-IKuo 郭俊驛 |
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Chun-IKuo 郭俊驛 |
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Chun-IKuo 郭俊驛 Research and Implementation of Real-Time Visual Target Tracking SoC System via FPGA Technique |
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Chun-IKuo |
title |
Research and Implementation of Real-Time Visual Target Tracking SoC System via FPGA Technique |
title_short |
Research and Implementation of Real-Time Visual Target Tracking SoC System via FPGA Technique |
title_full |
Research and Implementation of Real-Time Visual Target Tracking SoC System via FPGA Technique |
title_fullStr |
Research and Implementation of Real-Time Visual Target Tracking SoC System via FPGA Technique |
title_full_unstemmed |
Research and Implementation of Real-Time Visual Target Tracking SoC System via FPGA Technique |
title_sort |
research and implementation of real-time visual target tracking soc system via fpga technique |
publishDate |
2010 |
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http://ndltd.ncl.edu.tw/handle/82801526298216062920 |
work_keys_str_mv |
AT chunikuo researchandimplementationofrealtimevisualtargettrackingsocsystemviafpgatechnique AT guōjùnyì researchandimplementationofrealtimevisualtargettrackingsocsystemviafpgatechnique AT chunikuo jīyúkěguīhuàluójízhènlièshèjìjìshùzhīdīchéngběnjíshíyǐngxiàngzhuīzōngsocxìtǒngyánjiūyǔshíxiàn AT guōjùnyì jīyúkěguīhuàluójízhènlièshèjìjìshùzhīdīchéngběnjíshíyǐngxiàngzhuīzōngsocxìtǒngyánjiūyǔshíxiàn |
_version_ |
1718125052769075200 |