Implementation of bilayer structure for dielectric and electrode layers to improve performance on p-type organic thin film transistors

• Main Authors: Yao-TsuHuang, 黃耀族
• Other Authors: Yan-Kuin Su
• Format: Others
• Language: en_US
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/44236632802608173582

碩士 === 國立成功大學 === 電機工程學系專班 === 98 === In this thesis, the performances of pentacene-based OTFTs had been successfully improved by employing bilayer structure for electrode and dielectric layer. The bilayer electrodes consists of a metal oxides(MoO3, WO3, V2O5) interlayer between semiconductor(pentacene) and metal electrodes such as Au and Al. The major roles of metal oxides in OTFT was to act as charge injection layer as a result of aligning mismatch of energy level between metal and semiconductor as well as formed ohmic contact at interface. Electrical performances improvement was particularly observed for device with low-work-function metal electrode such as Al, including at least two orders higher in saturation induced current and On/Off ratio as well as lower threshold voltage from -24 V to -9 V. The extraction of contact resistance (Rc) on top-contact OTFTs from TLM was used to characterize the surface property in order to prove the interface with metal oxide did ohmic, and contact resistance was reduced from 2.1 MΩ to 0.1 MΩ if device utilized MoO3 as interlayer. Another section in this thesis is to increase capacitance by utilizing nanoparticles and smooth by PMMA polymer to form bilayer gate dielectric. The influence of thickness for PMMA modified layer and nanoparticles layer to electrical properties had been investigated. Two types of nanoparticles(SiO2, Al2O3) were used for comparison in this work. Ambipolar behavior in output characteristics was observed for both nanoparticle used as bilayer gate dielectric, pentacene-based OTFT did not exhibit n-channel transport as using PMMA for single layer dielectric. The device properties influenced by gate dielectric such as capacitance, surface morphology, hysteresis behavior had been characterized. Comparing with the single layer polymeric dielectric, the major improvement for bi-layer dielectric structure were higher capacitance from 5.6 (nF/cm2) to 12 (nF/cm2) with similar gate dielectric thickness, therefore electrical properties such as induced current was increased at least one order. Mobility in saturate regime for OTFTs with nano-SiO2 bilayer gate dielectric was calculated, which was 0.78 (cm2/Vs) and 0.025 (cm2/Vs) for high-voltage and low-voltage applications respectively.