Studies of organic non-volatile memory device with polymeric charge trapping layer

• Main Authors: Yu-HaoChen, 陳昱豪
• Other Authors: Horng-Long Cheng
• Format: Others
• Language: zh-TW
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/05335209916994038869

碩士 === 國立成功大學 === 光電科學與工程研究所 === 98 === We investigated organic non-volatile memory devices that are operated at low-voltage and are based on organic thin-film transistors (OTFTs) with pentacene as an active layer. Hafnium dioxide (HfO2) was used as the main gate dielectric to reduce operation voltage. Four kinds of polymer materials were used as the charge trapping layer, which was created via a spin-coating process on the HfO2 layer. The four kinds of polymer materials that were employed included poly(vinyl alcohol) (PVA), cross-linked poly(4-vinylphenol) (C-PVP), polystyrene (PS), and polymethylmethacrylate (PMMA). The electrical characteristics of the organic non-volatile memory devices, including memory window, program/erase speed, retention, and endurance, were also discussed. We studied the influence of the surface properties of polymer charge trapping layers on the morphology of pentacene films and the electrical characteristics of the corresponding memory devices. When PVA was used as the charge trapping layer, the memory window of the device was the largest (i.e., 3.46 V) as compared to the memory windows when using the other polymer layers. Atomic force microscopy measurements indicate that the surface morphologies of PVA and the pentacene layer on PVA both exhibited a relatively high amount of surface roughness. Moreover, a large difference in surface energy was observed between the pentacene layer and the PVA surface. As a consequence, we suggest the possibility of a considerable amount of trap states in the pentacene/PVA interface, thereby causing a large threshold voltage shift in the device. Compared with other organic non-volatile memory devices, the device with the PMMA charge trapping layer shows superior electrical characteristics. Specifically, the device with PMMA has a 2.41 V memory window after a 20 V program operation for 1 sec, and approximately 81% of the memory window still remains after 103 sec. Additionally, good endurance properties were also observed after 40 program/erase cycles. In conclusion, we have demonstrated a simple and inexpensive approach for the low-temperature fabrication (＜200 ℃) of low-voltage operated (＜ 25 V) organic non-volatile memory devices with polymer charge trapping layers. These devices also show excellent endurance properties after multiple program/erase cycles.