| Summary: | 碩士 === 國立交通大學 === 電子工程系所 === 98 === The focus of this thesis is the research of the convolutional turbo code (CTC) defined in IEEE 802.16e OFDMA and implement on the C6416 DSP. We explain the duo-binary circular recursive systematic convolutional encoding (duo-binary CRSC) and use BCJR decoding algorithm by max-log-MAP. We employ the C program to insure the
correctness of our algorithm and compensate the performance loss by max-log-MAP, furthermore, simulate the CTC for different modulations in AWGN.
Then, we implement on TI C6416 DSP, changing trellis order and using intrinsic function to achieve parallel operation. Therefore, we improve decoder operation speed efficiently. For original decoder just can achieved a processing rate of 800 Kbps . For improved decoder , which is approximately 2 times speed up in decoding rate. Therefore, the decoder can achieve a further data processing rate of 1500 Kbps.
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