Process and Technology For Low Voltage MONOS Non-Volatile Memory

• Main Authors: Lee, Tsung-Han, 李宗翰
• Other Authors: Chin, Albert
• Format: Others
• Language: en_US
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/74689600010490016741

碩士 === 國立交通大學 === 電子研究所 === 98 === Recently, the Flash memory is commonly used in portable electronic products, such as cell phone, MP3 player and USB Flash. However, with the increase in requirements for products, the technology and process must be still improved. The key issue for poly-Si floating gate non-volatile memory is the electrically conductive charge storage layer, where the programmed electrons will leak out through the single oxide defect. Such oxide defects are generated by the program and erase stress operation. In order to maintain the data retention, the thick tunnel oxide (6-7 nm) is required. That is opposite to the VLSI scaling trend. In addition, the memory device with thick tunnel oxide requires a higher operation voltage. To overcome this problem, the conductive poly-Si is replaced by discrete trapping nitride to form the [poly-Si or metal gate]-SiO2-Si3N4-SiO2-Si SONOS or MONOS memory. The isolated charges stored in discrete traps can prevent complete charge leakage. Therefore, a thinner tunnel oxide can be used. This in turn yields lower voltage and faster speed for program and erase. In this dissertation, we demonstrated a low voltage, fast speed and good data retention MONOS memory device with high work function MoN metal gate, novel interactive high-k?nHfO2-ZrO2 structure for trapping layer substituted conventional Si3N4 trapping layer.