| Summary: | 碩士 === 國立中央大學 === 電機工程研究所 === 98 === This thesis presents K-band voltage controlled oscillator (VCO) and injection locked frequency divider (ILFD) circuits which can apple in Ultra Wideband system of front-end receiver. The circuits were implemented in TSMC 0.13-?m and 0.18-?m CMOS technologies.
The thesis is organized as follow, Chapter 1 give the motivation and induction of system applications. Chapter 2 introduces two Ka-band VCOs topologies which were fabricated in 0.18-?m CMOS technology. The first VCO mainly targeted for low power consumption and low phase noise. The circuit topology is an LC-VCO with current reuse technique to reduce power consumption and obtain low phase noise performance. The measured oscillation central frequency is 12.15 GHz with tunable frequency range from 12.02 to 12.33 GHz. The power consumption is 2.59 mW from a power supply of 1.5 V, and -113 dBc/Hz phase noise at 1 MHz offset. The maximum output power is -4.9 dBm. The figure of merit (FOM) is high up -190.7 dBc/Hz. The second VCO is designed for wideband tuning frequency by switch capacitor array. The complementary cross-coupled differential LC-VCO was adopted. Two bits capacitance switch was used to choose the tunable frequency range. The measured oscillation central frequency is 12.2 GHz with a tunable frequency range from 11.8 to 12.61 GHz by using the 2-bit switch control (from 00 to 11). The power consumption is 7.538 mW under a power supply of 1.8 V, and -108 dBc/Hz phase noise at 1 MHz offset. The maximum output power is -2.48 dBm. The best FOM is -180.5 dBc/Hz.
Chapter 3 presents a Ku-band VCO topology which was fabricated in 0.13-?m CMOS technology. The parasitic resistance on the inductor and varactor generate thermal noise, to increase phase noise in the circuit. Therefore, cross-coupled transistors provide the sufficient negative resistance. The VCO circuit utilizes the parasitic capacitance between back and gate as a varactor which is part of LC tank to tune the oscillation frequency. This high Q bulk capacitance provides a good phase noise performance. The measured oscillation central frequency is 25.6 GHz with tunable frequency range from 25.47 to 25.98 GHz. The power consumption is 1.372 mW under a power supply of 0.6 V, and -109.9 dBc/Hz phase noise at 1 MHz offset. The maximum output power is -1.93 dBm. The best FOM is very good up to -196.6 dBc/Hz.
Chapter 4 develops a Ka-band ILFD topology which was fabricated in 0.18-?m CMOS technology. This frequency divider used two different injection paths to enhance the second harmonic which will widen the locking range ILFD. The measured free run frequency of ILFD is 6.6 GHz. The power consumption is 2.25 mW under a power supply of 1.8 V. The phase noise is -137 dBc/Hz at 1 MHz offset which VCO is under injection locked. The locking range is from 12.1 to 14.3 GHz with control voltage tuning from 0 to 1.8 V. The maximum output power is -6 dBm. The FOM is 7.44.
Finally, a brief conclusion is given in Chapter 5.
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