A Digital PLL Using Current-Step Controller for Wide Operating Range Application
碩士 === 國立中央大學 === 電機工程研究所 === 98 === In this thesis, a digital phase-locked loop (DPLL) with the wide operating range is presented. The architecture of the proposed DPLL uses a digital loop filter to replace passive loop filter for area saving purpose. The DPLL maintains the system stability by redu...
Main Authors: | Yu-Ling Chang, 張毓玲 |
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Other Authors: | Kuo-Hsing Cheng |
Format: | Others |
Language: | zh-TW |
Published: |
2010
|
Online Access: | http://ndltd.ncl.edu.tw/handle/65751523933391402842 |
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