Chip Design of gate driver for TFT-LCD Applications

• Main Authors: Cao-Yuan Zhi, 曹元志
• Other Authors: Zhi-Ming Lin
• Format: Others
• Language: en_US
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/95311066275684370790

碩士 === 國立彰化師範大學 === 積體電路設計研究所 === 98 === The driver circuits of TFT-LCD are composed of two parts, the source driver and the gate driver. In this thesis, we focus on the design of gate driver circuits for TFT-LCD display. The architecture consists of the following major blocks, i.e., a shift register, level shifter, and output buffer. We propose a high-speed full-swing output digital driver for heavy-loads TFT-LCD gate drivers. High driving capability is achieved by using a Single Capacitor Bootstrapped (SCB) technique. The proposed technique the Capacitors numbers and thus can expect to have lower power consumption and reduce delay time. The gate driver has been implemented in TSMC 2P4M 0.35 m CMOS technology and Hspice. Measured results indicate that the delay time is within 2.8 μs for the scan-line load modeling of TFT-LCD UXQA panel in a 5 V supply voltage. The obtained average power is 1.5 mW.