Analysis of Vias in Print Circuit Board Using Hybrid Finite-Difference/Finite-Volume Time-Domain Method
碩士 === 國立中山大學 === 電機工程學系研究所 === 98 === In high-speed digital circuits, in order to utilize the space of printed circuit boards(PCB) efficiently, the signal via is a heavily used interconnection structure to communicate different signal layers. However, because of vias are small and irregular structu...
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ndltd-TW-098NSYS54420452015-10-13T18:39:45Z http://ndltd.ncl.edu.tw/handle/50622322241127223833 Analysis of Vias in Print Circuit Board Using Hybrid Finite-Difference/Finite-Volume Time-Domain Method 結合時域有限差分法及時域有限體積法分析印刷電路板中過孔結構 Chan-Yi Chen 陳長億 碩士 國立中山大學 電機工程學系研究所 98 In high-speed digital circuits, in order to utilize the space of printed circuit boards(PCB) efficiently, the signal via is a heavily used interconnection structure to communicate different signal layers. However, because of vias are small and irregular structure in the PCB. When we try to simulate these problems with traditional FDTD method. We must using more fine grid to approximate the structure, so it will take a lot CPU memory and computing times. In this author, we try to combine FDTD and FVTD method. Take FVTD method in these partial small structure and magnify grid in a ratio. Finally, combine the larger FDTD grid to achieve reducing the numbers of grids that will save CPU memory and raise computing speed. In addition, we will present another solution that shifting via to replace using small size via based on a method that is using cascaded EBG structure achieve broadband effects to cost down. Chih-Wen Kuo 郭志文 2010 學位論文 ; thesis 66 zh-TW |
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碩士 === 國立中山大學 === 電機工程學系研究所 === 98 === In high-speed digital circuits, in order to utilize the space of printed circuit boards(PCB) efficiently, the signal via is a heavily used interconnection structure to communicate different signal layers. However, because of vias are small and irregular structure in the PCB. When we try to simulate these problems with traditional FDTD method. We must using more fine grid to approximate the structure, so it will take a lot CPU memory and computing times. In this author, we try to combine FDTD and FVTD method. Take FVTD method in these partial small structure and magnify grid in a ratio. Finally, combine the larger FDTD grid to achieve reducing the numbers of grids that will save CPU memory and raise computing speed. In addition, we will present another solution that shifting via to replace using small size via based on a method that is using cascaded EBG structure achieve broadband effects to cost down.
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Chih-Wen Kuo |
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Chih-Wen Kuo Chan-Yi Chen 陳長億 |
author |
Chan-Yi Chen 陳長億 |
spellingShingle |
Chan-Yi Chen 陳長億 Analysis of Vias in Print Circuit Board Using Hybrid Finite-Difference/Finite-Volume Time-Domain Method |
author_sort |
Chan-Yi Chen |
title |
Analysis of Vias in Print Circuit Board Using Hybrid Finite-Difference/Finite-Volume Time-Domain Method |
title_short |
Analysis of Vias in Print Circuit Board Using Hybrid Finite-Difference/Finite-Volume Time-Domain Method |
title_full |
Analysis of Vias in Print Circuit Board Using Hybrid Finite-Difference/Finite-Volume Time-Domain Method |
title_fullStr |
Analysis of Vias in Print Circuit Board Using Hybrid Finite-Difference/Finite-Volume Time-Domain Method |
title_full_unstemmed |
Analysis of Vias in Print Circuit Board Using Hybrid Finite-Difference/Finite-Volume Time-Domain Method |
title_sort |
analysis of vias in print circuit board using hybrid finite-difference/finite-volume time-domain method |
publishDate |
2010 |
url |
http://ndltd.ncl.edu.tw/handle/50622322241127223833 |
work_keys_str_mv |
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