| Summary: | 博士 === 國立清華大學 === 電子工程研究所 === 98 === As complementary metal-oxide semiconductor (CMOS) technology progresses, the supply voltage drops from 5V and 3.3V to 2.5 V or even lower than.1.2 V for CMOS technology beyond the 90 nm technology node. The delicate transistors in modern integrated circuits (ICs) are becoming more sensitive to transient voltage stress or electrostatic discharge. Hence, the rating voltage of the corresponding protection device should be reduced to accommodate these changes.
For power line protection, the leakage caused by band-to-band tunneling in low-voltage transient voltage suppressor (TVS) devices would be a major problem. For data line protection, one key feature is to maintain low capacitance of these TVS devices to prevent interference with the protected circuits.
In this dissertation, there are two targets: the improvement on leakage for commercially available low-voltage TVS devices and the design of new TVS structure to effectively reduce the overall capacitance. A simple method of blanket-ion implantation is used to reduce leakage in low-voltage TVS. By adapting electric field enhancement structure, the breakdown voltage can be reduced and the relationship between the breakdown voltage and junction capacitance on conventional TVS diodes can be broken. A device with two junctions in series is another way to reduce the capacitance. Based on the current capability difference between forward and reverse biased diodes, an asymmetry structure is also used to further reduce the overall capacitance and increase the current handling capability of the two-junction device.
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