新世代電晶體及記憶體控制單元
碩士 === 國立臺灣師範大學 === 光電科技研究所 === 98 === In order to follow Moore’s law and beyond the physical limitation, the trend of CMOS industry is developing toward scaling down. Therefore, the technology of stackable memory devices and advanced FET had been studied in this work. In order to optimize t...
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| Format: | Others |
| Language: | zh-TW |
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2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/44295787301966276166 |
| Summary: | 碩士 === 國立臺灣師範大學 === 光電科技研究所 === 98 === In order to follow Moore’s law and beyond the physical limitation, the trend of CMOS industry is developing toward scaling down. Therefore, the technology of stackable memory devices and advanced FET had been studied in this work.
In order to optimize the bi-direction devices, we used TCAD simulator for the process and structure design, as well as the M/I/M and M/S/M prepared. The HKMG p-TFET had been demonstrated for advanced FET with the gate last process. We also discuss the mechanism of the substrate orientation and anisotropic effect on ON-current of SiGe (110). The G-FET has been design and prepare for high performance FET with Tunneling mechanism.
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