The Electrical and Structural Properties of Al/CeAlO/p-Si MIS Capacitors Fabricated by RF Sputtering

• Main Authors: Guan-Ting Lai, 賴冠廷
• Other Authors: Ching-Pao Cheng
• Format: Others
• Language: zh-TW
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/21035709235740514540

碩士 === 國立臺灣師範大學 === 機電科技研究所 === 98 === Ultra-thin high-k CeO2 and CeAlO films were independently deposited on p-type Si-substrate by RF magnetron co-sputtering as the gate insulators of metal-insulator-semiconductor (MIS) capacitors. The film deposition was carried out in the oxygen/argon (O2/Ar) ambient with various ratios at room temperature, and the physical thickness of the films was determined to be about 7 nm by ellipsometry. After deposition, a rapid thermal anneal (RTA) in nitrogen (N2) ambient was then performed at 550 or 850℃. The crystalline phases and morphologies of the high-k films after RTA were analyzed by X-ray diffraction (XRD) patterns and atomic force microscopy (AFM) measurements, respectively. Moreover, J-V (current density-voltage) and high frequency (1 MHz) C-V (capacitance-voltage) measurements were performed with Agilent B1500A electrometer and 4980 LCR meter, respectively, for electrical characterization. Transmission electron microscopy (TEM) and X-ray photoelectron spectroscopy (XPS) were utilized to confirm the microstructures of the CeO2 and CeAlO insulators and their interfacial layers formed in contact with the Si-substrates. According to XRD, CeO2 films are amorphous after 550℃ annealing but are crystallized after 850℃ annealing. Moreover, as annealing temperature increases from 550 to 850℃, both the dielectric constant and gate leakage current of CeO2 films decrease. This phenomenon is attributed to a thicker interfacial layer (Ce-silicate) formed after a higher temperature RTA, which is confirmed by XRD, XPS, and TEM. On the other hand, CeAlO films remain amorphous after 850℃ annealing, indicating that the incorporation of Al into CeO2 suppresses the crystallization. Furthermore, as the O2/Ar ratio during film deposition increases from 0:5 to 3:5, the dielectric constant increases and the gate leakage current decreases. This behavior is consistent with the oxygen vacancy model. In conclusion, electrical and material properties of CeO2 and CeAlO gate insulators have been measured and compared. The addition of Al into CeO2 can raise crystallization temperature. The leakage current of CeO2 or CeAlO is suggested to be dominated by silicate thickness or oxygen vacancies, respectively.