| Summary: | 碩士 === 國立臺北科技大學 === 電腦與通訊研究所 === 98 === This thesis is devoted to the design and implementation of 909 ~ 919 MHz FH-SS digital RF transceiver, including the pseudorandom hopping pattern of the transmit carrier frequency, sequential scan/lock of the receive frequency, encoding/decoding of the wireless data packet, and performance optimization of the entire FH-SS digital RF transceiver. The format of the wireless data packet involves the following fields: preamble, synchronous header, payload data, and guard time.
Noise and interference are ubiquitous in the thin air and inevitable in any wireless communication link. Fortunately, the frequency-hopping spread spectrum (FH-SS) signaling method is known to be highly resistant to narrowband interference. Hence a slow FH-SS approach is investigated in this thesis.
In slow FH-SS digital RF transmission/reception, the Microchip PIC16F914 microcontroller and its 35 PIC16 assembly language instructions are utilized (1) to dynamically set the pseudorandom transmit frequency of the 902 ~ 928 MHz Micrel MICRF600 RF transceiver module and (2) to help the receiver sequentially scan/lock onto the carrier frequency. Furthermore, a proper communication protocol is presented to facilitate reliable digital RF communications.
Lastly, the antenna, RF module, and microcontroller are integrated to realize the whole FH-SS system, whose reliability and range are then put to test in open sites.
|
|---|
