Design of UWB CMOS Low Noise Amplifier with Current-reused Technology

• Main Authors: Ta-cheng Liu, 劉大成
• Other Authors: Meng-Ting Hsu
• Format: Others
• Language: zh-TW
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/70988539077187471511

碩士 === 雲林科技大學 === 電子與資訊工程研究所 === 98 === This thesis presents the research and implement on low noise amplifier for Ultra wide band. The chip was fabricated using TSMC commercial 0.18-μm 1P6M CMOS technology. The efficiency of the circuit was demonstrated by measurement. In first chip, an ultra-wideband (UWB) low noise amplifier (LNA) utilizes an inverter cell as input matching network and shunt resistive-feedback technique is proposed. The implemented LNA achieves a maximum power gain of 18.5 dB, and a good input matching of 50Ω in the required band. The measured IIP3 is about -8dBm, and the minimum noise figure (NF) of 3.67 dB was obtained in the frequency band of 2-6 GHz. It consumes a power dissipation of 10.3mW under a 1.5V power supply. In second chip, we utilize the current-reused structure to design a ultra-wideband low noise amplifier. The minimum noise figure is 8.4 dB and maximum gain is 3.4dB from 3.1 to 10.6 GHz while drawing 13.2mW from a 1.7V supply voltage. The input and output return loss are both better than -6.8dB and -11dB, isolation better than -52dB, respectively. The input third-order intercept point IIP3 is -2dBm.