| Summary: | 碩士 === 雲林科技大學 === 電機工程系碩士班 === 98 === With the rapid growth of the information technology, electronic products become the necessities in our life. In order to pursue better performance, their operating speed also becomes higher. Thus, the problem of Electro-Magnetic Interference (EMI) will also be increased so as to affect the accuracy of the system operation. A lot of methods have been proposed to diminish EMI. spread spectrum clocking has been proved to be the easiest and the most efficient way.
In this thesis, we propose a Spread Spectrum Clock Generator (SSCG) for SATA-III which utilizes triangle profile with down-spread 5000ppm. It is compatible for 6/3/1.5Gbps SATA specifications. We use a fractional-N frequency synthesizer with delta-sigma modulator to accomplish the spread spectrum function. Using digital third-stage delta-sigma modulation technique, the quantization noise can be shaped to high frequency band and eliminated by low pass filter characteristic. A pulse-swallow divider using fractional dual-modulus prescaler circuit can obtain half phase step improvement compared with the conventional dual-modulus prescaler.
We use TSMC CMOS 0.18μm 1P6M technology for design and simulation. The supply voltage is 1.8V. The modulation frequency is set to be 32.4 KHz. The EMI reduction values are 54dB, 49dB, and 45dB for 6GHz, 3GHz, and 1.5GHz, respectively. And the overall power consumption is 27.5mW.
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