An Efficient ESL Co-Simulation Platform using Shared-Memory Communication Scheme

• Main Authors: Cho-MingYang, 楊卓銘
• Other Authors: Chung-Ho Chen
• Format: Others
• Language: zh-TW
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/40878732337947085991

碩士 === 國立成功大學 === 電機工程學系碩博士班 === 99 === Hardware-software co-designs are getting more and more important for complex SoC development. This thesis anylyzes a hybrid simulation system and improves the efficiency of the simulation based on a platform using QEMU and CoWare tool[16]. The co-simulation system includes QEMU simulating the ARM processor, and the CoWare tool simulating hardware with socket connecting both sides. After analyzing the simulation structure, we find that the current simulation systrem has massive socket communications, and this significantly increases simulation overhead due to the long communication time of sockets. Therefore, this thesis presents a communication method to replace socket with shared memory to improve the simulation efficiency up to 1.46 times. For benchmark Bunny, the improvement is up to 1.6 times. For ESL level simulation with CoWare, because SystemC library only supports single thread execution, this thesis also introduces a concept that extracts part of the heavy workload in hardware simulation and moves this part of simulation to a process outside of the CoWare platform. Shared memory is used to be the interface that exchanges the data for the two simulation processes. The hardware simulation with CoWare can then have better simulation efficiency, and the hardware simulation platform can speed up to about 3.6 times in average.