A Study on the Fabrication, Characterization, and Modeling of a Novel Device with a Suspended Nanowire Channel

• Main Authors: Hsu, Yu-Hsien, 許宇賢
• Other Authors: Lin, Horng-Chih
• Format: Others
• Language: en_US
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/00509486531370150994

碩士 === 國立交通大學 === 電子研究所 === 99 === In this thesis, we have fabricated and studied the suspended-nanowire (NW)-channel TFTs. The devices use the sidewall-spacer etching technique to form the poly-Si NW channel of transistors, and the whole device structures can be formed by a simple and low-cost fabrication flow. In the experimental work, we’ve designed a new mask set which contains a number of devices with varying structural parameters. Results of the fabricated devices generated from these designs could help verify the accuracy of a theoretical model developed in this thesis. From our previous work [37, 40], we have learned that such kind of devices would show ultra-low subthreshold swing (S.S.) and hysteresis characteristics. Based on our analytical model, we can calculate the Vpi and Vpo and predict most of the effects of structural parameters and operation conditions. It is also helpful for us to understand the origin of the ultra-low S.S. when pull-in phenomenon occurs. Moreover, basic electrical characteristics of the device can be well described. Lastly, by changing some parameters of the measurements to vary the gate sweeping rate, we have explored the effects of the charge time on Vpi and Vpo. It is also interesting to observe complex oscillation phenomena when the sweeping rate is slow. Finally, we’ve proposed a new structure which has Si nano dots embedded in the gate nitride in an effort to lower the van der Waals force as the channel is in contact with the gate nitride. Using this structure we can effectively roughen the surface of the gate nitride which in turn would lower the effective contact area and thus reduce the van der Waals force.