| Summary: | 碩士 === 國立清華大學 === 資訊工程學系 === 99 === This paper proposes an instruction-oriented approach to improve processor simulation speed while maintaining timing accuracy. Existing advanced processor simulation approaches are known to be able to do functional simulation at very high speed, yet efficient and accurate timing calculation is still a challenging task. Little improve has been achieved in improving simulation speed without sacrificing accuracy. In this paper, we propose an efficient and effective instruction-oriented approach that simulates only necessary states instruction-by-instruction, instead of updating all states cycle-by-cycle. This approach can apply to various types of processor, including superscalar processor. The experimental result shows that the simulation performance is nearly 10 times faster than the traditional cycle-accurate approach, while the result is 100% accurate.
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