| Summary: | 碩士 === 國立臺灣師範大學 === 應用電子科技研究所 === 99 === The fabrication of integrated circuit has entered the nano-grade with the improvement of modern technology. This progress not only reduces the circuit area greatly, but also lowers the supply voltage significantly. Chips with high-performance and low-power have been proposed constantly today, the main demand of these chips nowadays is more power saving for portability. Hence, the low power technology has become a trend in modern integrated circuit designs. Although the decreasing of the supply voltage can effectively save power consumption of digital circuits, it also increases the difficulty of designing analog-to-digital converters (ADCs) circuits, which plays an important role in many applications. Fortunately, Delta-sigma modulators are insensitive to the imperfections of the analog components, including the mismatch between elements, the gain of OPAMPs, etc… which are of great influence to low-power chips. Therefore, they’re usually designed and applied for high-resolution systems such as instruments, audio devices, and communication devices.
In this thesis, we propose and construct two new structures. The first one is an improved Sturdy Multi-stage Noise Shaping (SMASH) structure. Here are three key-points of SMASH: (a) it reduces the gain requirement of the operational amplifier (OPAMP) (b) analogy modulator adopting the Digital feed-forward (DFF) path (c)input dynamic range larger than conventional DSM with the distortion of modulator reduced. The second structure is a modulator using successive approximation register (SAR) ADC. This architecture reduces power consumption and simplifies circuit complexity. Two of the modulators are constructed in 90-nm 1P9M CMOS and 0.18-m 1P6M CMOS process technology, respectively. Both modulators process 25-KHz audio-band, with 63 dB and 82dB peak SNDR. Total power dissipations are 813 mW and 463 mW, respectively.
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