Implementation of Novel Multi-Phase Voltage-Controlled Oscillators

碩士 === 國立臺灣科技大學 === 電子工程系 === 99 === In wireless communication system, frequency synthesizers are used to implement the frequency up/down converting of signal. In a frequency synthesizer, voltage-controlled oscillator (VCO) and divider are the key blocks. For VCOs, low phase-noise output is required...

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Bibliographic Details
Main Authors: San-Sheng Lin, 林三勝
Other Authors: Shih-Hsiang Hsu
Format: Others
Language:en_US
Published: 2011
Online Access:http://ndltd.ncl.edu.tw/handle/2t7muh
Description
Summary:碩士 === 國立臺灣科技大學 === 電子工程系 === 99 === In wireless communication system, frequency synthesizers are used to implement the frequency up/down converting of signal. In a frequency synthesizer, voltage-controlled oscillator (VCO) and divider are the key blocks. For VCOs, low phase-noise output is required to avoid corrupting the mixer-converted signal by close interfering tones. The output of the VCO is divided down by the frequency divider which requires operating at high frequencies, wide operating range and lower power consumption. We present a three-phase VCO and two Quadrature VCOs in this thesis. In the first circuit, it’s a three-phase complementary colpitts VCO using the triple-push coupling. The second circuit is a Quadrature VCO using ring inductor technique. In the third circuit, we proposed a VCO which provides quadrature outputs by PMOSFET common-gate -coupling technique. Firstly, a prototype 5.3 GHz VCO in 0.35 μm CMOS process is proposed to generate 3 output phases and it uses three identical single-ended complementary Colpitts VCOs in a balanced configuration and coupled via the bonding inductors to provide 3-phase outputs. The 3-phase VCO oscillates from 5.15 GHz to 5.45 GHz and the power consumption is 4.34 mW. The phase noise is -119.18 dBc/Hz at 1 MHz offset frequency from 5.37 GHz. The VCO occupies a chip area of 0.82 × 0.636 mm2 and provides a figure of merit of -187.5 dBc/Hz. Secondly, a QVCO uses a closed-loop ring inductor and is implemented in a standard TSMC 90 nm 1P9M CMOS technology. This QVCO operates between 7.05 GHz and 8.15 GHz. The measured phase noise of the VCO operating at 8.15 GHz is -119.98 dBc/Hz at 1 MHz offset while the QVCO draws 4.2 mA and 3.57 mW consumption from a supply voltage of 0.85 V. Finally, we presents a new quadrature voltage-controlled oscillator (QVCO), which consists of two n-core cross-coupled voltage-controlled oscillators (VCOs) with pMOSFET common-gate amplifiers and tail transformers as coupling devices. The free-running frequency of the QVCO is tunable from 6.47 GHz to 7.71 GHz . The measured phase noise at 1 MHz frequency offset is -116.01 dBc/Hz at the oscillation frequency of 7.43 GHz and the total power consumption is 2.7 mW, the figure of merit (FOM) of the proposed QVCO is -189.12 dBc/Hz.