Design of Multi-Band Voltage-Controlled Oscillator and Wide-Band Injection-Locked Frequency Divider

• Main Authors: Chao-wei Hsieh, 謝昭偉
• Other Authors: Sheng-lyang Jang
• Format: Others
• Language: en_US
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/hv49bn

碩士 === 國立臺灣科技大學 === 電子工程系 === 99 === The voltage controlled oscillator (VCO) and frequency divider (FD) plays a critical role at frequency synthesizer. For modern portable production (such as cell-phone) and multi-band system, the RF circuit satisfy except high-performance and low-complexity, designing requirements of these circuits become more stringent on the low-power, in recent years This thesis presents two voltage-controlled oscillators (VCOs), one quadrature voltage-controlled oscillator (QVCO), and an avtive-inductor injection-locked frequency divider by 3 which is using push-push oscillator. The first part we present a BiCMOS voltage-controlled oscillator (VCO), which was implemented in the standard TSMC 0.18 μm SiGe 3P6M BiCMOS process. The VCO consists of an nMOSFET cross-coupled oscillator stacked in series with source degenerated HBT diodes. SiGe HBT has an inherently low flicker noise compared to CMOS devices. At the supply voltage of 1.5 V, the output phase noise of the VCO is -122.01 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 5.6 GHz, and the figure of merit is -190.43 dBc/Hz. Secondly, we propose a differential triple-band voltage-controlled oscillator (VCO) which was designed and implemented in a 0.18 μm CMOS 1P6M process. The designed VCO circuit uses a differential Colpitts negative resistance cell and fourth-order passive LC resonator. At the supply voltage of 1 V, the core power consumption is 5.5 mW. The tuning range of the triple frequency bands are (1) 9.73 GHz to 11.06 GHz, (2) 9.07 GHz to 9.34 GHz, and (3) 3.64 GHz to 4.04 GHz. The output phase noise of the VCO is -111.02 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 9.82 GHz, and the figure of merit is -183.45 dBc/Hz. In The third part, a dual-band quadrature voltage-controlled oscillator (QVCO) has been studied and implemented in the TSMC 90nm 1P9M CMOS technology. The proposed CMOS QVCO comprises two complementary cross-coupled dual-resonance VCOs and 4 capacitors in a ring for coupling the two differential VCOs. The die area of the dual-band QVCO is 0.831×0.97 mm2. At the supply voltage of 1.1 V, the total power consumption is 2.75 mW. The free-running frequency of the QVCO is tunable from 8.77/3.68 GHz to 9.12/4.16 GHz as the tuning voltage is varied from 0.0/0.6 V to 0.5/1.1 V. The measured phase noise at 1 MHz frequency offset is -120.39/-118.75 dBc/Hz at the oscillation frequency of 8.79/3.847 GHz and the figure of merit (FOM) of the proposed QVCO is -194.86/-186.05 dBc/Hz. Finally, a new wide locking range active-inductor divide-by-3 injection-locked frequency divider (ILFD) using a standard 0.18 μm CMOS process is presented. The push-push ILFD circuit is realized with a push-push cross-coupled n-core MOS LC-tank oscillator. The core power consumption of the ILFD core is 7.41 mW. The divider’s free-running frequency is tunable from 1.39 GHz to 3.18 GHz by tuning the varactor’s control bias, and at the incident power of 0 dBm the maximum locking range is 2.9 GHz (43.6%), from the incident frequency 5.2 GHz to 8.1 GHz. The operation range is 5.9 GHz (80.27%), from 4.4 GHz to 10.3 GHz.