A Multi-controller Design for Huge-capacity Solid-State Drives

• Main Authors: Jhih-Jian Liao, 廖志堅
• Other Authors: Chin-Hsien Wu
• Format: Others
• Language: zh-TW
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/q88r5j

碩士 === 國立臺灣科技大學 === 電子工程系 === 99 === NAND flash-memory capacity has increased rapidly, and a huge-capacity solid-state drive (SSD) has become popular in the market. SSD consists of controllers and NAND flash-memory chips, and each chip is controlled by one controller. At present, each controller is responsible for a fixed number of chips and it can't control other chips that don't belong to it. Since each controller can only access a chip at a time, some idle controller can't access some chips that don't belong to it. As a result, it will reduce the system performance. In this paper, we will propose a multi-controller design for huge-capacity solid-state drives. Any chip will not be restricted to any specific controller and any idle controller can access any chip by the multi-controller design. We design a switch between buses, and each switch can help access requests from one controller to one chip. The number of switches used in each access request should be minimized and considered in the paper. The experimental results show that the proposed method can improve the system throughput of 25%, compared with traditional SSDs, and the incurred overhead is also reasonable.