| Summary: | 碩士 === 國立臺灣科技大學 === 電機工程系 === 99 === The thesis proposes two anti-windup methods, including zero voltage vector injection method and reference command correction method, for a synchronous reluctance drive system to achieve good transient responses and load disturbance responses. In this thesis, first, the configuration, characteristics and mathematical model of the synchronous reluctance motor are discussed. Then, the proposed anti-windup methods are presented. The methods can provide lower overshoot and faster setting time when compared to the drive system without using anti-windup mechanism. The details are discussed in this thesis.
A digital signal processor TMS-320F-28335, is used as the control center to execute the proposed two anti-windup methods. Experimental results validate the correctness and feasibility of the proposed methods.
Key words: anti-windup, synchronous reluctance motor, digital signal processor.
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