| Summary: | 碩士 === 國立雲林科技大學 === 電子與資訊工程研究所 === 99 === This thesis presents the research and implement on low noise amplifier for Ultra wide band. The chip was fabricated by TSMC commercial 0.18-μm 1P6M CMOS technology. The efficiency of the circuit was demonstrated from measurement.
The first chip, an ultra-wideband (UWB) low noise amplifier (LNA) with shunt resistive-feedback as input matching network and current-reused technique is proposed. The implemented LNA achieves a maximum power gain of 10.2 dB, and a good input matching of 50Ω in the required band. The measured IIP3 is about 0.7dBm, and the minimum noise figure (NF) of 5.5 dB was obtained in the frequency band of 3.1-10.6 GHz. It consumes power dissipation of 11.2mW under 1.2V power supply.
The second chip, an ultra-wideband (UWB) low noise amplifier (LNA) with resistive inverter configuration feedback amplifier to achieve the broadband input matching purposes, and used of self-forward-body-bias technique to further increase the gain of the whole frequency band and suppress the noise. The minimum noise figure is 4.8 dB and maximum gain is 17.8dB from 3.1 to 10.6 GHz while drawe 9.67mW from 1.2V supply voltage. The input and output return loss are both lower than -8.5dB and -15dB, isolation lower than -45dB, respectively. The input third-order intercept point IIP3 is -11.5dBm.
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