Design of Low Power Low Phase Noise CMOS VCO with Current Reused Topology

碩士 === 國立雲林科技大學 === 電子與光電工程研究所碩士班 === 99 === The fast-growing market in wireless communications requires small, cheap, wide band, low phase noise and low power RF circuits. The major challenge lies in the design of fully integrated low phase noise and low power voltage controlled oscillators (VCOs)...

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Bibliographic Details
Main Authors: Tsung-han Han, 韓宗翰
Other Authors: Meng-ting Hsu
Format: Others
Language:zh-TW
Published: 2012
Online Access:http://ndltd.ncl.edu.tw/handle/30972749443122888053
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Summary:碩士 === 國立雲林科技大學 === 電子與光電工程研究所碩士班 === 99 === The fast-growing market in wireless communications requires small, cheap, wide band, low phase noise and low power RF circuits. The major challenge lies in the design of fully integrated low phase noise and low power voltage controlled oscillators (VCOs) with appropriate tuning range performance simultaneously. The voltage-controlled oscillator (VCO) is one of the most important building blocks in the system. The chip fabrication of VCO is made by TSMC 0.18μm 1P6M CMOS standard process. The first chip presents a low power and low phase noise voltage controlled oscillator (VCO) for IEEE 802.11a applications, the Q enhancement and body-biased technology is designed to improve phase noise and power. The measured results exhibited phase noise -115.883 dBc/Hz at 1MHz offset frequency, Measured tuning range is about 15.8% from 5.08GHz to 5.96GHz and power dissipation is 0.99mW. The first chip presents a low power and low phase noise voltage controlled oscillator (VCO) for IEEE 802.11a applications, the Current-Reused and tail transistor technology is designed to improve phase noise and power. The measured results exhibited phase noise -116 dBc/Hz at 1MHz offset frequency, Measured tuning range is about 24.3% from 4.79GHz to 6.10GHz and power dissipation is 3.97mW.