DSP Implementation of H.264 Encoder

碩士 === 國立雲林科技大學 === 通訊工程研究所碩士班 === 99 === The goal of this paper is to port the H.264 reference C code "T264" developed by Chinese Video Encoding Freeware Organization to Texas Instruments(TI) TMS320DM642 DSP development platform.Since H.264 encoder is high in computational complexity, the...

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Main Authors: Kai-Ruei Jan, 詹凱瑞
Other Authors: Day-Fann Shen
Format: Others
Language:zh-TW
Published: 2011
Online Access:http://ndltd.ncl.edu.tw/handle/53733409884956732890
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spelling ndltd-TW-099YUNT56500172016-04-08T04:21:57Z http://ndltd.ncl.edu.tw/handle/53733409884956732890 DSP Implementation of H.264 Encoder H.264編碼器之數位訊號處理器實作 Kai-Ruei Jan 詹凱瑞 碩士 國立雲林科技大學 通訊工程研究所碩士班 99 The goal of this paper is to port the H.264 reference C code "T264" developed by Chinese Video Encoding Freeware Organization to Texas Instruments(TI) TMS320DM642 DSP development platform.Since H.264 encoder is high in computational complexity, the main challenge is to speed up encoding process for real-time (30 frames per second QCIF) video compression. In order to achieve this goal, we adjust parameters provided by TI Code Composer Studio''s (CCS) for option-level optimization, we also rewrite some functions in C code to linear assembly code and explore possible parallel processing. The experimental results show an average savings about 71% of computational complexity. Day-Fann Shen 沈岱範 2011 學位論文 ; thesis 63 zh-TW
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description 碩士 === 國立雲林科技大學 === 通訊工程研究所碩士班 === 99 === The goal of this paper is to port the H.264 reference C code "T264" developed by Chinese Video Encoding Freeware Organization to Texas Instruments(TI) TMS320DM642 DSP development platform.Since H.264 encoder is high in computational complexity, the main challenge is to speed up encoding process for real-time (30 frames per second QCIF) video compression. In order to achieve this goal, we adjust parameters provided by TI Code Composer Studio''s (CCS) for option-level optimization, we also rewrite some functions in C code to linear assembly code and explore possible parallel processing. The experimental results show an average savings about 71% of computational complexity.
author2 Day-Fann Shen
author_facet Day-Fann Shen
Kai-Ruei Jan
詹凱瑞
author Kai-Ruei Jan
詹凱瑞
spellingShingle Kai-Ruei Jan
詹凱瑞
DSP Implementation of H.264 Encoder
author_sort Kai-Ruei Jan
title DSP Implementation of H.264 Encoder
title_short DSP Implementation of H.264 Encoder
title_full DSP Implementation of H.264 Encoder
title_fullStr DSP Implementation of H.264 Encoder
title_full_unstemmed DSP Implementation of H.264 Encoder
title_sort dsp implementation of h.264 encoder
publishDate 2011
url http://ndltd.ncl.edu.tw/handle/53733409884956732890
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