Hierarchical Selection Recognition for Wafer Map

• Main Authors: Chun-Tien Wang, 王俊田
• Other Authors: hcliang
• Format: Others
• Language: zh-TW
• Published: 2012
• Online Access: http://ndltd.ncl.edu.tw/handle/79653794868002545219

碩士 === 中原大學 === 電子工程研究所 === 100 === Due to the challenge of analyzing extensive data of wafer maps, we construct a rule to identify defects on wafers for complete analysis. We propose two methods to solve this problem. For the seven common types of systematic errors on wafer maps, we use the values of NBD and NCD in Tornado Charts for the parameters in our algorithm. We develop a new identifying engine called Hierarchical Selection Recognition to recognize mix errors on wafer maps. Then we use the concept of Balance Checker to improve the accuracy of defect identification. Experiments show that our method can efficiently recognize many types of defects. It is very useful to users because of its simplicity, high efficiency and flexibility, which were verified by running on the real wafers of industry.