A 6-bit 1GS/s Current-Steering DAC
碩士 === 中原大學 === 電子工程研究所 === 100 === In this paper, a current-steering digital-to-analog converter with a 6-bit 1GS/s is designed. It is facilitated with TSMC 0.18 1P6M CMOS process with digital and analog supply voltage at 1.8V. With sampling frequency at 490MHz, the SFDR is obtained as 51dB, w...
Main Authors: | Hsing-Ming Lu, 盧星銘 |
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Other Authors: | Chun-Chieh Chen |
Format: | Others |
Language: | zh-TW |
Published: |
2012
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Online Access: | http://ndltd.ncl.edu.tw/handle/54230076085442256329 |
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