Design of High Performance Binary Signed-Digit Adder

碩士 === 國立勤益科技大學 === 電子工程系 === 100 === Binary Signed-Digit (BSD) number representation has inherently carry-free (CF) addition. Hence, it is widely applied in design of parallel arithmetic and high performance processor. The structure of a BSD adder design is mainly composed of three blocks including...

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Bibliographic Details
Main Authors: Yu-Hau Tzeng, 曾于豪
Other Authors: Shao-Hui Shieh
Format: Others
Language:zh-TW
Published: 2012
Online Access:http://ndltd.ncl.edu.tw/handle/59050694178419002052

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